1. Field of the Invention
This invention relates to a semiconductor device and a method of manufacturing the same, and more particularly to a MISFET (Metal Insulator Semiconductor Field Effect Transistor) having a dual metal gate electrode structure and a method of manufacturing the same.
2. Background Art
In recent years, MISFET devices have been downscaled for achieving high performance. However, downscaling involves thinning of the gate oxide film, which causes the problems of increased gate leak current or depletion of the gate electrode.
In order to avoid these problems, the gate leak current may be reduced by replacing the gate insulating film with a high dielectric film whose dielectric constant is higher than silicon oxide to gain physical thickness, and the gate electrode may be metallized to prevent the depletion of the gate electrode.
However, in a MISFET having a metal gate electrode structure, the threshold voltage of the transistor is determined by the impurity concentration of the channel region and the work function of the gate electrode. Therefore, to obtain a desired threshold voltage, a dual metal gate structure is required where the nMIS gate electrode is made of a metal material having a work function of 4.3 eV or less and the pMIS gate electrode is made of a metal material having a work function of 4.8 eV or more.
However, when a metal gate electrode containing silicon is formed on the high dielectric gate insulating film, the high dielectric gate insulating film material reacts with silicon contained in the metal gate electrode between the gate insulating film and the metal gate electrode, thereby varying the work function of the metal gate electrode. This may cause a problem of being unable to obtain the desired threshold voltage (see, e.g., E. Cartier et al., “Systematic study of pFET Vt with Hf-based gate stacks with poly-Si and FUSI gates”, Proc. Symp. on VLSI Tech. Digest, pp. 44-45, 2004).